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Introduction (1.1-1.3)
CMOS Fabrication and its implications (1.3, 3.1-3.5)
Elementary CMOS logic design and layout (1.4-1.5.5) See Chris Mack’s page for a nice litho tutorial.
MOS Device Equations (2.1-2.3.1)
CMOS Logic: Quantiative Analysis (2.3.2-2.6, 4.2)
Logical Effort (4.3)
Interconnect (4.5-4.6)
Simulating Circuits (5 – we won’t cover this material, but you may want to brush up on it)
Adders (10.1-10.2) Mathematical treatment of parallel prefix computation
Advanced static gate design (6.1-6.2.1)
Alternatives to static logic (6.2.2-6.2.5, 6.4-6.6)
Sequential Design (7.1-7.5)
Datapath (10.3-10.10)
SRAMs (11.1-11.2)
CAMs, ROMs, and PLAs (11.4-11.7)
MOS Devices in DSM (2.4)
Circuit Pitfalls (6.3)
Test (4.8, 9)
Low Power (6, with an emphasis on 6.5)
Kevin Nowka’s notes on low power design
Design for Skew (7.5-7.6, 12.5)
Packaging, Power Supplies, and I/O (12.2-12.4)
Scaling and Economics (4.9, and 8.5)
Kevin Nowka’s notes on variability: very up-to-date, with lots of hard data
Evolution of Intel processors
Case Study: Cell Processor. An article detailing the cell processor
Review





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