# vlsi interview questions-12

1. Simplify the following Boolean functions by means of three-variable K-maps. You must show the maps!

(a) F(X,Y,Z) = Σ m(1, 3, 6, 7) (b) F(X,Y,Z) = Σ m(3, 5, 6, 7)

(c) F(A,B,C) = Σ m(0, 1, 2, 4, 6) (d) F(A,B,C) = Σ m(0, 3, 4, 5, 7)

2. Simplify the following Boolean functions using K-maps. You must show the maps!

(a) X’Z’ + YZ’ + XYZ (b) A’B + B’C + A’B’C’

(c) A’B’ + AC’ + B’C + A’BC’

3. Simplify the following Boolean functions by means of four-variable K-maps. You must show the maps!

(a) F(A,B,C,D) = Σ m(1, 5, 9, 12, 13, 15) (b) F(W,X,Y,Z) = Σ m(1, 3, 9, 11, 12, 13, 14, 15)

(c) F(A,B,C,D) = Σ m(0, 2, 4, 5, 6, 7, 8, 10, 13, 15)

4. Simplify the following Boolean functions, including the don’t care conditions. You must show the maps!

(a) F(A,B,C,D) = Σ m(0, 6, 8, 13, 14) + Σ d(2, 4, 10)

(b) F(A,B,C,D) = Σ m(1, 3, 5, 7, 9, 15) + Σ d(4, 6, 12, 13)

5. Draw the two-level NAND logic diagram for each of the following expressions (convert to SOP first):

(a) W(X + Y + Z) + XYZ

(b) (A’B + CD’)E + BD’(A + B)

6. Implement the following function using only EXCLUSIVE-OR, AND, and NOT gates:

(AB + A’B’)(CD’ + C’D) // Hint: Look for XOR, XNOR expressions

7. Using the verilog AND, OR and NOT primitives, write a complete verilog module for the expression

F7 = X’Z’ + YZ’ + XYZ

which will require three AND instances, two NOT instances, and one OR instance as well as the declaration

of some intermediate wires. It may be easier to sketch the SOP first, to visualize the interconnections.

8. Using only the verilog NAND and NOT primitives, write a complete verilog module for the expression

F8 = A’B + B’C + A’B’C’

which will require four NAND instances and three NOT instances, as well as the declaration of

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