Power Comparison Between High Speed Electrical and Optical Interconnects for Interchip Communication

An I/O bandwidth commensurate with a dramatically increasing on-chip computational capability is highly desirable. Achieving this goal using board-level copper interconnects in the future will become increasingly challenging owing to severe increase in high-frequency, skin-effect and dielectric loss, noise due to crosstalk, impedance mismatch, and package reflections. The solutions designed to overcome these deleterious effects require complex signal processing at the interconnect endpoints, which results in a larger power and area requirement. Optical interconnects offer a powerful alternative, potentially at a lower power. Prior work in comparing the two technologies has entailed overly simplified assumptions pertaining to either the opticalor the electricalsystem. In this paper, we draw a more realistic power comparison with respect to the relevant parameters such as bandwidth, interconnect length and bit error rate (BER) by capturing the essential complexity in both types of interconnect systems. At the same time, we preserve the simplicity by using mostly analytical models, verified by SPICE simulations where possible. We also identify critical device and system parameters, which have a large effect on power dissipation in each type of interconnect, while quantifying the severity of their impact. For optical interconnect, these parameters are detector and modulator capacitance, responsivity, coupling efficiency and modulator type; whereas, in the case of electrical system, the critical parameters include receiver sensitivity/offset and impedance mismatch. Toward this end, we first present an optimization scheme to minimize optical interconnect power and quantify its performance as a function of future technology nodes. Next, on the electrical interconnect side, we examine the power dissipation of a state-of-the-art electrical interconnect, which uses simultaneous bidirectional signaling with transmitter equalization and on-chip noise cancellation. Finally, we draw extensive comparisons between optical and electrical interconnects. As an example, for bandwidth of 6 Gb/s at 100 nmtechnology node, lengths greater than the critical length of about 43 cm yields lower power in optical interconnects. This length becomes lower (making optics more favorable) with higher data rates and lower bit error rate requirement. Index Terms—Dielectric and skin effect attenuation, electrical interconnect, equalization, interchip communication, modulator, noise modeling, optical interconnect, power comparison, power modeling, simultaneous bidirectional signaling, transimpedance amplifier.

DIFFERENT classes of digital systems impose specific requirements on the communication medium. These requirements pertain to the communication length scale and the figure of merit of relevance (bandwidth or latency). The choice of the communication medium is heavily dependent on these factors. For example, long-haul systems ubiquitously use optical fibers because of low attenuation at high bandwidths. Systems at shorter length scales have traditionally used copper (Cu) interconnects for both latency and bandwidth sensitive applications. However, as the computational bandwidth of the modern integrated circuits (ICs) (measured by the product of the number of transistors and the clock frequency) increases dramatically according to the Moore’s law, Cu traces at short distances at least in bandwidth sensitive applications are struggling to keep up, rendering communication bandwidth a bottleneck.

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