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post silicon validation


Post Silicon Validation, is basically a validation method to make sure that your fabricated chip (since it is fabricated it is post silicon) is working correctly. Basically it is including all testing methods (testing silicon on board in the labs).

It is done to find out if the fabricated chip works or not, and if it works that it meets specification.

In digital ASIC design flow, the test / debug engineers develop test coverage techniques such as Design for Test (DFT), and perform pre-silicon validation, as well as, post-silicon debugging to ensure usability.

Basically, if you look in a ASIC design flow, in the Gate level netlist, the DFT, BIST, ATPG is applied. Then when the flow is finished after Physical Layout, you send your chip for fabrication. When you receive it back, then you apply post silicon validation in a lab. You probably will need to develop a PCB (unless you used a DIP package) and using lab equipment (oscilloscopes, function generators, multimeters, power supplies, spectrum analyzers etc) you will test your chip. All this is part of the post silicon validation.

Post Silicon Validation is realtime testing of the silicon chip. Modern design specifies that most chips have DFT (Design for Testability) such that the chip design includes test circuitry for testing of core and I/O. After fabrication, the test circuitry is used to check for faults using automatic test equipment.





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