Ring Oscillator

The ring oscillator is a very simple oscillator circuit, based on the switching delay existing between the input and output of an inverter. If we connect a odd chain of inverters, we obtain a natural oscillation, with a period which corresponds roughly to the number of elementary delays per gate. The fastest oscillation is obtained with 3 inverters (One single inverter connected to itself do not oscillate). The usual implementation consists in a series of five up to one hundred chained inverters. Usually, one inverter in the chain is replaced by a NAND gate to enable the oscillation (Figure 12-31).

The 3-inverter ring-oscillator layout is shown in figure 12-32. The right-most inverter output is connect the left-most inverter input by a metal bridge to create the desired feedback. Notice that no clock is assigned in this layout as the oscillation appears naturally, because of an intrinsic instability. The simulation of figure 12-33 shows the “warm-up” of the inverter circuit followed by a stable frequency oscillation.

The main problem of this type of oscillator is the very strong dependence of the output frequency with virtually all process parameters and operating conditions . As an example, the power supply voltage VDD has a very significant importance on the oscillating frequency. This dependency can be analyzed using the parametric analysis in the Analysis menu. Several simulations are performed with VDD varying from 0.8V to 1.4V with a 50mV step. We clearly observe a very important increase of the output frequency with VDD (Almost a factor of 2 between the lower and upper bounds). This means that any supply fluctuation has a significant impact on the oscillator frequency.

The oscillation frequency of the ring oscillator is not stable, not controllable, and somehow not precisely predictable, as it is based on the switching characteristics of logic gates, which may fluctuate +/-20%. A Monte Carlo analysis is performed in figure 12-35, to observe the technology variation influence on the oscillator frequency. The basic principles of this analysis is to sort in a random way a set of technological parameters, and conduct for each random set the complete analog simulation. Each point in the X axis corresponds to one simulation, with a specific set of parameters. There is no correlation between adjacent points, because of the random nature of each simulation conditions. We observe again the significant fluctuation of the oscillator frequency. As a conclusion, ring oscillators have poor performances, and may only be used in low performance clocking systems, or for a dynamic characterization of the technology. We experienced the design of several ring oscillators on CMOS test chips also to tune Microwind simulations with real-case ring oscillator measurements, and obtained a good correlation between measured and simulated oscillator frequency.

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