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Low Power techniques for RFICs


Silicon RF ICs provide functions suitable for processing of a signal being received or of a signal to be transmitted. These
include RF amplification, signal generation, modulation and frequency conversion. The benefits of integration include
reduced component count, control of parasitics, definition of architecture breakdown and signal levels, shrinkage of area,
improved product yield, potentially reduced cost, improved signal matching and interference immunity
Low power techniques are important for a number of applications including battery powered radio systems such as
cellular and cordless products, radio pagers and remote meter readers where extending the time between battery
recharge/change is a dominant design goal. For example, second generation pagers are required to operate for up to 1
year on one ‘AA’ cell and meter readers are expected to operate for 10 years without battery recharge or battery change.
To reduce power consumption in an application it is necessary to look at all levels of design and all areas of design.
Although the focus of this talk is on low power techniques for silicon RF ICs it is of course necessary to consider the
other areas of the design where power reduction techniques would apply such as: How is low frequency processing
performed? – in the analogue or digital domain; what level of digital activity does the application require? – the lower the
switching rate of logic gates, the lower the power consumed – and so on.
Techniques to minimise power consumption can be controlled at four stages in an application: the system level, the
architecture level, at the circuit level and at the technology level. It is unlikely for an individual designer to have control
at all of these levels: for instance the system operation of the application may already have been designed – possibly at
international level, or the technology choice for the application may be limited by product volume and cost targets.





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