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Integrated Power Electronics Module-free thesis


To achieve high power density, low profile, the fundamental approach of electrical power processing is steadily moving toward high switching frequency. From previous analysis, high switching loss and high stress limited the ability to operate front end DC/DC converter at higher switching frequency. From the history of power electronics, the technology improvements in power semiconductors have been the driving force for this problem. Moving from bipolar to MOSFET technology has greatly increased switching speed. For current semiconductor technology, very fast devices are available. For the power MOSFET used in front end application, they could be switched with mega hertz frequency range. The limiting factor now is the packaging technology. Because of the parasitic inductance and capacitance due to the packaging technology, the switching action has to be slowed down to limit the stress and undesirable noise problem. This limited the ability to reduce the switching loss of the devices. For a typical front-end converter, individual power devices are mounted on the heat sink. Driver, sensors and protection circuits are implemented on a PCB, which is mounted close to power devices. The power devices are packaged with wire bonding technology. This kind of package has several limitations: first, the parasitic related to the wire bond and PCB connection is very large; second, with wire bond technology, three-dimensional integration is not possible which limits the electromagnetic layout and thermal management. Some manufacturers have taken a more aggressive approach by integrate power semiconductors in die form on one common substrate with wire bonding. This approach provides some improvement by putting devices closer, but it doesn’t resolve the limitations of traditional packaging technology.

From above discussion we can see, while power devices are still one of the major barriers for future power system development, it doesn’t currently pose the fundamental limitations to power conversion technology. It is rather packaging, control, thermal management and system integration issues that are the major barriers limiting the fast growth of power conversion applications. To address these issues, advanced packaging technology is essential. Another important issue for high power density is the packaging of passive components like magnetic and capacitors, which occupied biggest part of the system. With trend of low profile, planar magnetic is a must technology. With planar magnetic, passive integration technique could be realized with high power density, low profile and better thermal performance.

In this part, the planar metalization device connection, which allows threedimensional integration of power devices, and integration of power passives to increase the power density, as these dominate the physical size of the system, will be discussed.

the high frequency decoupling capacitor is paralleled with the DC link electrolytic capacitor and physically installed at the device terminals. By integrating the capacitor into the package, the interconnection from the capacitor to DC/DC switch is simplified and the decoupling effect is improved. Besides the concern of the parasitic inductance in the power path during switching commutation, the common source inductance between gate driver path and the main power path affects switching loss greatly too. During turn-off, the voltage drop on the common source inductance dynamically reduces gate voltage slew rate applied to the gate of MOSFET die, the switching speed is slowed down and this limits the switching loss reduction. Integrating the gate driver circuitry along with the devices further reduces the effective gate driver loop inductance.

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