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FPGA for DSP


This case study was to investigate the design of a JPEG encoder [1] on an FPGA target and a comparison of the design to an encoder on a DSP target. The study was based on a previous study of a JPEG encoder performed at UCLA [2]. In their study, several student teams were charged with the task of designing a JPEG encoder, but each team targeted a different target platform or design tool. They present results for the following tools/platforms:

C compiler, Blackfin processor
C compiler, TI C5410
A|RT Designer, FPGA
Celoxica DK1, FPGA
For this study, I started with an example dataflow implementation in C developed at UCLA, and targeted an FPGA using the Impulse C design software from Impulse Accelerated Technologies [3]. Impulse C is a C-based hardware synthesis tool based on the Stage Master TM synthesis engine licensed from Green Mountain Computing Systems, Inc. The remaining sections present the Impulse C design flow, the JPEG implementation, performance results, and a comparison to the UCLA results on a DSP.

Impulse C Design Flow

Impulse C is an FPGA design tool that enables the user to develop high-level dataflow designs in C, and automatically synthesize the designs to VHDL for implementation on an FPGA. A design is described as a set of one or more processes, each implemented by a standard C procedure. The following diagram illustrates the Impulse C design flow when starting from legacy C code, as in this study.

First, the legacy code is partitioned into one or more processing blocks that will communicate with each other via streams, signals, or shared memory. Each processing block is represented by a C procedure. The blocks communicate using any of the stream, signal, or shared memory functions provided by the Impulse C library. A C configuration function is then written that creates the processes along with the streams, signals, and shared memory blocks that connect them together. Again, this is accomplished with functions provided by the Impulse C library. All of the processes, communication and configuration are described using standard C code, and the user can use any standard development environment to develop the code.

The next step is to compile and run the application to verify its behavior. Impulse C provides a desktop implementation of the Impulse C library, based on threads, to allow the application to be compile and run using standard C/C++ development tools on the desktop.

The final step is to synthesize. In this step, each process is configured to target either software or hardware. The Impulse C software will synthesize the C code representing each hardware process into VHDL, as well as the necessary hardware/software interfaces that allow the hardware and software processes to communicate.

Implementation read to http://www.gmvhdl.com/fpga_for_dsp.html





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