digital to analog converter

DAC specifications

In a DAC, the Differential Non-linearity measures the deviation from the ideal case of 1 LSB transitions in the analog output value. An ideal DAC has a DNL of zero. It is measured in units of Least Significant Bits (LSB).

It is the type of DAC in which either external or internal reference voltage source can be used. The internal reference (Vref,int) is an accurate reference built on the chip which can be used for accurate conversion if no external reference is used. (Output = (G* x D / 2^n) x Vref,int) External voltage reference (Vref) can be used so that the output of DAC would swing from 0 to (G* x Vref) depending upon the input code provided. (* G depends upon the device)

It is the type of DAC in which the gain of the output amplifier of the DAC can be adjusted. Thus the DAC can be configured to have different output gains using either internal or external reference. The output voltage would be given by ((Vref x D / 2^n) x Gain) where the gain is set by the value of the external resistors connected to the output and the gain adjust pin.

Gain Error indicates how well the slope of the output transfer function compares with the slope of the ideal transfer function. It is typically expressed as a percentage of the Full scale range (% of FS) and is usually measured at full-scale.

In a Digital to Analog Converter INL is the deviation at any given code from the ideal transfer function. It can also be measured by taking the sum of the differential non-linearities from the lowest value to the given step. It is measured in units of Least Significant Bits (LSB).

A DAC is said to be monotonic if for every increase in the input code the output always increases.

The output amplifier typically has some offset due to non-idealities. This can be adjusted externally to cancel the effect of those non-idealities to cater to the particular application to provide an accurate output in the region of interest. This is called offset adjustment.

Offset Error indicates how well the actual analog output of the DAC matches with the ideal output at zero scale.

The output can swing from the maximum voltage on the chip (e.g. Vdd) to the minimum voltage (e.g. Ground). This behavior is called Rail-to-Rail output swing.

It is the amount of time that the output of the DAC takes to change its value from the current output to the new output value once it is instructed to change the output. On the datasheet it is usually specified for a full-scale transition from GND to full-scale. (Some manufacturers specify quarter-scale transition settling time which is typically much less than full-scale settling times figure).

Shutdown modes are used for power saving when the converter output is not being used. This type of DAC can have many different programmable output modes. User can program the output to have high impendence, terminated with 1 k-ohm or 10 k-ohm resistance etc. depending upon the requirement of the particular application.


It is the measure of the maximum rate that the output of the DAC can change. It is typically limited by the slew rate of the output amplifiers of the DAC.


Microwire is a simple three wire serial communication interface. The three wires are the serial clock (SCLK), serial data out (MISO) and serial data in (MOSI). The data is shifted in on the rising edge of the clock and is shifted out on the negative edge of clock. The clock in this protocol has a fixed polarity and phase.

SPI (Serial Peripheral Interface) is a newer version of the Microwire protocol. The clock polarity and phase can be configured giving four distinct combinations allowing the SPI to communicate with protocols like microwire and microwire/plus (slight variation of microwire). All other operations are similar to microwire protocol.

QSPI (Queued Serial Peripheral Interface) is an abstraction layer above the basic SPI hardware specification. Allows interrupt driven buffered I/O for the Motorola SPI between IC level components


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  1. Guru

    Digital-to-analog converter (DAC) chips transform information from digital to analog form. They convert signals that have two defined states, on and off, into signals that have a theoretically infinite number of states. For example, modems convert digital computer data that consists of ones and zeroes into audio frequency (AF) tones that can be transmitted over telephone lines. Digital-to-analog converter chips are also used in digital signal processing to improve the intelligibility and fidelity of analog signals. First, analog-to-digital converter chips (ADCs) are used to convert analog signals into digital form. Next, special circuitry is used to improve these signals. Finally, digital-to-analog converter chips are used to transform the digital impulses back into analog form.

    There are several architectures for digital-to-analog converter (DAC) chips. Some DACs use a resistive ladder network (R2R) in which each segment consists of two resistors: one with a value of R and one with a value of 2R. Other DACs include a string of resistors, each of which has a value of R. Current steering is an architecture that uses an internal current source to deliver the output current. Sigma-delta architecture takes a fundamentally different approach. In their most basic form, sigma-delta converters consist of an integrator, a comparator, and a single-bit DAC. The output of the digital-to-analog converter (DAC) is subtracted from the input signal. The resulting signal is integrated, and the output voltage is converted to a single-bit digital output by the comparator. The resulting bit becomes the input to the DAC, and the output is subtracted from the input signal.

    Performance specifications for digital-to-analog converter (DAC) chips include resolution, settling time, differential nonlinearity (DNL), integral nonlinearity (INL), power dissipation, reference access, and special features. Resolution measures the number of discrete levels used to represent a signal and is usually defined in bits. Settling time is the time required for an output to approach a final value within the limits of a defined error band. The DNL error is the difference between the ideal and measured output values for successive DAC codes. The INL error is the amount that a measured transfer function deviates from an ideal transfer function as defined in a straight line drawn from zero to full scale. Power dissipation is the maximum number of watts that the device dissipates. Reference access indicates whether the voltage reference is an internal power supply, or the user supplies the voltage reference. Special features include rail-to-rail outputs, single supply, and on-chip electrostatic discharge (ESD) protection.

    Digital-to-analog converter (DAC) chips are available in a variety of integrated circuit (IC) package types. Basic types include ball grid array (BGA), quad flat package (QFP), single in-line package (SIP), and dual in-line package (DIP). Many packaging variants are available. For example, BGA variants include plastic-ball grid array (PBGA) and tape-ball grid array (TBGA). QFP variants include low-profile quad flat package (LQFP) and thin quad flat package (TQFP). DIPs are available in either ceramic (CDIP) or plastic (PDIP). Other IC package types for digital-to-analog converter chips include small outline package (SOP), thin small outline package (TSOP), and shrink small outline package (SSOP).