cross talk issue in transreciver
Managing cross-talk between different circuit building blocks is one of the main challenges in developing a fully integrated transceiver and even more in developing a single-chip base-band plus transceiver component.
crosstalk via the power supplies is counter-acted by a deliberated grouping of circuits to specific voltage regulators. For On chip power supply and ground routing star connections have been applied where appropriate. MIM capacitances running along the power supply tracks offer extra supply decoupling at high frequency.
A lot of attention has been paid to avoid cross-talk via the ESD protection structures and the tracks routed for ESD protection. As ESD standards require pin to pin protection, even digital IO’s have connection paths to the analog IO’s via the ESD protection implementation. The voltage regulators and analog circuits are carefully grouped and separated from each other on distinct IO supply rails. Back-to-back diodes are put in series between the rails of critical analog parts and a common ESD protection track.
Of course, switching noise originated from digital parts needs a lot of care and attention. Possible sources are mainly the large digital base-band processor circuit and the digital circuits in the fractional-N PLL. The logic has been implemented by “splitted supply” standard cells and IO’s, allowing separate power connections for the switching currents and for the substrate and well connections. This is particularly important in case of wire bonding, the most recent version of the chip presented uses flip-chip bumping. In order to maintain latch-up immunity at the package pin level, grounds and supplies are connected in the substrate of the BGA substrate in case of wire bonding.
The main digital base-band processor part is separated from the transceiver part by an on-chip isolation wall in the silicon substrate. Also “aggressive” and “sensitive” transceiver parts are separated from each other by these isolation structures