The performance of a integrated silicon PD depends on both the material properties, such as absorption coefficient and mobility of carriers, and optical wavelength. Besides these, it is strongly dependent on the device structure, which is limited dielectric values, layer thicknesses, and doping profiles. For example, a conventional vertical PD designed in bulk CMOS process achieves larger responsivity but smaller bandwidth, compared to a same size PD implemented in epitaxial CMOS process, where the substrate consists of a low doped epitaxial layer on top of a heavily doped substrate. Consedering the transport mechanisms of electrons and holes, we know that a highly doped p-type material will help the recombination of electrons . This mechanism in a epi-CMOS PD helps the recombination of the carriers generated deep inside the substrate, which has very weak or no electric field at all, and hense causes these carriers to either drift or diffuse slowly. The recombination of these slow transport components increase the bandwidth of the device, whereas reduce the responsivity. Our prototype PDs are implemented in epi-CMOS technology.
DNW is an n-type layer buried inside the expitaxial layer in epi-CMOS technologies. This layer is typically used for improving transistor isolation from the substrate and reduce the substrate noise coupling in mixed-signal and RF circuits. The new PD structure (Fig.1) can be implemeted by adding DNW to a lateral PIN PD structure, connecting all the n regions together. This structure creates two seperate junctions: one with the isolated p-region on the top and the other with the epi layer and the substrate on the bottom. The upper one becomes a hybrid lateral-vertical PIN structure with a thinner depletion region than without the DNW. Whereas, the bottom PN junction increases the electric field magnitude, and hence the drift speed of the generated carriers close to the epi/substrate interface. The electric field distribution inside a finger segment is shown in Fig.2. The heavily doped substrate recombines the carriers generated deep in the substrate reducing the diffusion current contribution, therefore enhancing the bandwidth of the device.