CMOS LNA design and development

A 900-MHz CMOS Ultra-Low Noise Amplifier (LNA) has been integrated in a 0.35mm RF CMOS process with on-chip inductors. The LNA, housed in a standard TQFP48 package, features: Noise Figure NF=0.9dB with S11=-10.1dB, S22=-27dB, Power Gain Gp=14dB, input IP3=0dBm at Pdc=18mW. A NF=1.05dB is measured at Pdc=9mW. The reported LNA exhibits the best noise or power performance ever reported in CMOS technology.

The demand for reduced size and cost of portable equipment and the availability of base-band CMOS circuitry, motivate the integration of the Low Noise Amplifier (LNA) in BiCMOS/RFCMOS technologies. Although SiGe Bipolar transistors within current BiCMOS technologies are superior to their n-MOS counterparts due to their higher gm/Ic ratio, high speed CMOS processes have already proved to be a viable option for the design of the LNA and continue to evolve at a fast pace.

In this paper the first sub-1dB Noise Figure 900-MHz CMOS LNA for wireless communications is reported. The LNA, fabricated in a 0.35mm RF CMOS process with on-chip inductors, has been housed and characterised into a standard multi-pin TQFP48 package. The cascode configuration improves the reverse isolation and reduces the Miller capacitance seen at the input of M1. An on-chip inductor (Ld=5.5nH) tunes the output of the LNA The almost noiseless inductive degeneration provides input match (together with the external Lg inductor) and improves the input IP3. At the series resonance of the input circuit, the real part of the LNA impedance is equal to Rs=wT*(Ls+Lp), where Ls=1.4nH is the on-chip inductor and Lp is the parasitic inductor associated to package, bondwire and application board. The quality factor Qin of the input resonator (thus the width W1 of the transistor M1) sets the impedance seen at the gate of M1: the drain thermal noise and the gateinduced current noise contributions to the NF are respectively decreased and increased when Qin is increased. Qin also affects the system IP3, as it sets the voltage swing across the gate-source terminals of the M1 transistor.

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