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ASIC Design flow


1. Architectural/behavioral design: See the definition of chip architecture in
Section 4.2.
2. RTL design: Designers are developing and reviewing system-level and functional
Register Transfer Level HDL code and implementing the desired functionality.
Verilog and VHDL are the standard languages used for this
function.
3. Logic design: Digital or functional simulations are performed as part of validating
a behavioral model of the intended design. The simulation verifies
that the chip architecture is feasible and will perform the desired operation.
4. Logic/timing optimization: This step is the most famous one and has revolutionized
IC design from the days of full-custom schematic-based designs.
The HDL code implemented in previous steps is useless without the ability
to synthesize the code.
In this stage, synthesis tools require two inputs: the design functionality
in terms of RTL code, and a standard cell library with synthesis views
and timing information. For each function coded within the HDL, the synthesis
tool will chose the most appropriate library cell or combination of
library cells to perform the job. The end result of synthesis is a netlist that
contains standard cells and their connectivity.
5. Place-and-route: Place-and-route tools (P&R) are automated tools that require
the following:
• Standard cell library physical information, i.e., cell sizes, points of connectivity,
timing, routing obstructions
• A synthesized netlist that details the instances and connectivity relationships
including constraints and critical paths in the design
• All the process requirements for connectivity layers, including design
rules of the routing layers, resistance and capacitance, power consumption,
and electromigration rules for each layer
Using this information, the layout is implemented automatically and
optimized for minimum area and ideal timing.

ASIC-FPGA

FPGA CPLD ASIC and DSP Pages

Xilinx Home-ISE Logic Design Tools – Xilinx Home : Products and Solutions : ISE Logic Design Tools : ISE for CoolRunner-II Designs.

Lattice Semiconductor – FPGA, CPLD and SERDES Programmable Logic Devices by Lattice Semiconductor. Programmable Devices and Solutions From Lattice.

Quartus II Web Edition Software – Device Support The Quartus II Web Edition software includes support for selected MAX II, Cyclone, Stratix, Stratix II, APEX II, Excalibur, FLEX 10KE, MAX 7000S, MAX 7000B, MAX 7000AE, and MAX 3000A devices.

FPGAs are fun! – Most electronic designers are nowadays familiar with advanced technologies like microcontrollers or basic programmable devices, but FPGAs are not yet commonly used. Well, that’s a mistake. Information on FPGAs FPGA tutorials, projects and boards.

eg3.com – “best of the web” for embedded systems, dsp, real-time/rtos, board-level computing, soc and more… check out our new marcom survey results , this week’s new sites , or register for free email alerts by keyword.

GALBlast – GALBlast is a hobbyist grade GAL programmer that connects to the parallel printer port of your PC. It will program fusemaps stored in standard JEDEC files into GAL chips 16V8/A/B/C/D/Z/ZD, 18V10/B, 20V8/A/B/Z, 20RA10/B, 20XV10/B, 22V10/B/C/Z, 26CV12/B, 6001/B and 6002B manufactured by Lattice, National Semiconductors and STMicrosystems.

Actel FPGA – Award-winning FPGAs based on Flash and antifuse technologies.

Altera – With industry-leading FPGA, CPLD, and structured ASIC, Altera provides programmable logic technology with software tools, embedded systems.

Cypress – Produces a wide range of semiconductors including programable logic devices, memory, chipsets and networking ICs.

Field Programmable Gate Array – The AT6000, AT40K and AT40KAL family are FPGAs with the ability to implement Cache Logic design.

OpenCores – Freely available, freely usable and re-usable open source hardware.

Analog Devices DSP : Embedded Processing & DSP : Blackfin Processor Home.

What is DSP? The Scientist and Engineer’s
Guide to Digital Signal Processing.

NI LabVIEW FPGA – The NI LabVIEW FPGA Module extends LabVIEW graphical development to reconfigurable FPGAs on NI RIO enabled hardware.
STMicroelectronics –
ASIC Design Flow advanced technologies through a comprehensive set of libraries and CAD environments.

DSP-TI – Digital Signal Processing Development Technologies for innovative system development and application.

Digital Signal Processing Central – “how to” information about DSP.utorials for beginners, but tips and insights of interest to intermediate and advanced DSPers.
OpenDSP.





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