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antenna effect in cmos layout


A side effect of the manufacturing process that leads to damaged parts is known
as the antenna effect. Under certain conditions, plasma etchers or ion implanters
induce charge onto various structures that connect to a gate of a transistor. The
induced charge threatens to overstress and irreparably damage the thin gate
oxides of the transistor, causing unreliable operation.

Charge is readily induced during the manufacturing process if a structure is
built in such a way that it acts like an antenna.

As the gate size gets smaller and more metals are added to a chip, and as
process engineers reduce the thickness of the oxides, the antenna effect can have
a greater impact on the yield of a wafer

Re: Antenna effect in cmos layout

How to elliminate the antenna effect

1. breaking up the long poly that acts like an antenna.

2. diode placed near the transistor in danger to eliminate
the effect of the metal antenna. As soon as enough charge is induced onto the
metal by the antenna effect, the diode diverts the charge to the substrate
Antenna effect –Question

hi
a.What kind of charge is accumulated on the gate during etching?
from where these charges come from?
b.Why it is called antenna effect?
c.how metal hopping reduces antenna effect?

Thanks
Prabhat

Re: Antenna effect in cmos layout

Hi,
more discussion on plasma etching can answer your question

Plasma etching is a technique widely utilized in the fabrication of VLSI . In a plasma-filled environment, reactive ions generated in an ion discharge are accelerated by an electric field and collide with the wafer surface carrying the semiconductor device being fabricated. This is a high energy bombardment that well achieves the desired anisotropic etching characteristics for the device wafer being processed.

The plasma etching, however, also causes certain undesirable damage to the wafer. Glow discharge naturally results in electric charging in some regions over the wafer surface. Such charging is insignificant under normal conditions. However, if this charging occurs in a conductive layer region (for example, at the polysilicon gate) formed over the surface of the wafer, the resulting “antenna effect” causes excessive current by which the characteristics of a gate oxide layer located beneath the conductive layer can be severely degraded. The antenna effect occurs when interconnection conduction lines act as “antennas,” amplifying the charging effect.

It is called as antenna effect as the conducting layers are receiving . Antenna as a general defined as receiving and transmitting element.

If you break the long metal lines , although each conducting layer will accumulate the charge , but not enough to bring problem to your design. The rule is deifined in the technology files.





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