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An all-digital PLL with a first order noise shaping Time-to-Digital Converter


FREE-DOWNLOAD F Brandonisio… – Circuits and Systems (ISCAS), …, 2010 –
Abstract—This paper presents an All Digital PLL (ADPLL) based on a first order noise shaping
Time-to-Digital Converter (TDC). The architectures of two state-of-art ADPLLs and a state-
of-art Gated Ring Oscillator (GRO) TDC are described. The architecture of the GRO TDC





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