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A self-testing and calibration method for embedded successive approximation register ADC


FREE-DOWNLOAD This paper presents a self-testing and calibration method for
the embedded successive approximation register (SAR) analog-to-digital converter (ADC)
The successive approximation register (SAR)
ADC is widely used in modern mixed-signal
SOC designs
High power efficiency and low area overhead
Component mismatch limits its performance

ADC testing in SOC design is difficult
Requires high quality test stimulus
Lengthy testing
I/O accessibility is limited





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