A 6-bit, 0.2 V to 0.9 V highly digital flash ADC with comparator redundancy

FREE-DOWNLOAD DC Daly… – Solid-State Circuits, research …, 2009
Abstract—A 6-bit highly digital flash ADC is implemented in a 0.18 m CMOS process. The ADC
operates in the subthreshold regime down to 200 mV and employs comparator redundancy and
reconfigurability to improve linearity. The low-voltage sampling switch employs voltage