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A 0.92 mW 10-bit 50-MS/s SAR ADC in 0.13μm CMOS process


FREE-DOWNLOAD CC Liu, SJ Chang, GY Huang… – VLSI Circuits, 2009 …, 2009 –
In conventional successive approximation register (SAR) ADCs, the primary sources of power dissipation are the digital control circuit, comparator and the DAC capacitor array. The digital power reduces with advancement of technology. However, the power of comparator and capacitor network is limited by mismatch and noise issuesˁ Recently, several energy-efficient switching methods have been presented to reduce the switching energy of the DAC capacitor network. These works reduce the unnecessary energy wasted in switching sequence. However, the SAR control logic becomes more complicated due to the increased capacitors and switches. This work proposes a set-and-down switching method to save the power consumption in switching procedure without splitting or adding any capacitors and switches. In addition, the method also improves the settling speed of the DAC





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